From 9d2e8f2f27ec467e9004e0d94f8106b3bb1d0afd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?R=C3=A9mi=20Verschelde?= Date: Mon, 9 Nov 2020 14:53:05 +0100 Subject: Variant: Rename Type::_RID to Type::RID The underscore prefix was used to avoid the conflict between the `RID` class name and the matching enum value in `Variant::Type`. This can be fixed differently by prefixing uses of the `RID` class in `Variant` with the scope resolution operator, as done already for `AABB`. --- core/variant/variant_op.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'core/variant/variant_op.cpp') diff --git a/core/variant/variant_op.cpp b/core/variant/variant_op.cpp index 0def758388..4704deac20 100644 --- a/core/variant/variant_op.cpp +++ b/core/variant/variant_op.cpp @@ -1778,7 +1778,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_EQUAL, Variant::STRING_NAME, Variant::STRING_NAME); register_op>(Variant::OP_EQUAL, Variant::NODE_PATH, Variant::NODE_PATH); - register_op>(Variant::OP_EQUAL, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_EQUAL, Variant::RID, Variant::RID); register_op(Variant::OP_EQUAL, Variant::OBJECT, Variant::OBJECT); register_op(Variant::OP_EQUAL, Variant::OBJECT, Variant::NIL); @@ -1824,7 +1824,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_NOT_EQUAL, Variant::STRING_NAME, Variant::STRING_NAME); register_op>(Variant::OP_NOT_EQUAL, Variant::NODE_PATH, Variant::NODE_PATH); - register_op>(Variant::OP_NOT_EQUAL, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_NOT_EQUAL, Variant::RID, Variant::RID); register_op(Variant::OP_NOT_EQUAL, Variant::OBJECT, Variant::OBJECT); register_op(Variant::OP_NOT_EQUAL, Variant::OBJECT, Variant::NIL); @@ -1854,7 +1854,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_LESS, Variant::VECTOR2I, Variant::VECTOR2I); register_op>(Variant::OP_LESS, Variant::VECTOR3, Variant::VECTOR3); register_op>(Variant::OP_LESS, Variant::VECTOR3I, Variant::VECTOR3I); - register_op>(Variant::OP_LESS, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_LESS, Variant::RID, Variant::RID); register_op>(Variant::OP_LESS, Variant::ARRAY, Variant::ARRAY); register_op>(Variant::OP_LESS_EQUAL, Variant::INT, Variant::INT); @@ -1866,7 +1866,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_LESS_EQUAL, Variant::VECTOR2I, Variant::VECTOR2I); register_op>(Variant::OP_LESS_EQUAL, Variant::VECTOR3, Variant::VECTOR3); register_op>(Variant::OP_LESS_EQUAL, Variant::VECTOR3I, Variant::VECTOR3I); - register_op>(Variant::OP_LESS_EQUAL, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_LESS_EQUAL, Variant::RID, Variant::RID); register_op>(Variant::OP_LESS_EQUAL, Variant::ARRAY, Variant::ARRAY); register_op>(Variant::OP_GREATER, Variant::BOOL, Variant::BOOL); @@ -1879,7 +1879,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_GREATER, Variant::VECTOR2I, Variant::VECTOR2I); register_op>(Variant::OP_GREATER, Variant::VECTOR3, Variant::VECTOR3); register_op>(Variant::OP_GREATER, Variant::VECTOR3I, Variant::VECTOR3I); - register_op>(Variant::OP_GREATER, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_GREATER, Variant::RID, Variant::RID); register_op>(Variant::OP_GREATER, Variant::ARRAY, Variant::ARRAY); register_op>(Variant::OP_GREATER_EQUAL, Variant::INT, Variant::INT); @@ -1891,7 +1891,7 @@ void Variant::_register_variant_operators() { register_op>(Variant::OP_GREATER_EQUAL, Variant::VECTOR2I, Variant::VECTOR2I); register_op>(Variant::OP_GREATER_EQUAL, Variant::VECTOR3, Variant::VECTOR3); register_op>(Variant::OP_GREATER_EQUAL, Variant::VECTOR3I, Variant::VECTOR3I); - register_op>(Variant::OP_GREATER_EQUAL, Variant::_RID, Variant::_RID); + register_op>(Variant::OP_GREATER_EQUAL, Variant::RID, Variant::RID); register_op>(Variant::OP_GREATER_EQUAL, Variant::ARRAY, Variant::ARRAY); register_op>(Variant::OP_OR, Variant::NIL, Variant::NIL); -- cgit v1.2.3