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authorRĂ©mi Verschelde <rverschelde@gmail.com>2020-05-11 13:45:48 +0200
committerGitHub <noreply@github.com>2020-05-11 13:45:48 +0200
commit32133a11b56761df99579ad96ee29a47d2aed6b4 (patch)
treeab68992cfe6b1f59a618f713545fdcb3b6488b07 /thirdparty/oidn/mkl-dnn/src/cpu/cpu_convolution_pd.hpp
parentbbdfc7353c3af72fcdf037ff10b8571aa2afc230 (diff)
parent1bea8e1eacc68bcedbd3f207395bccf11011dae2 (diff)
Merge pull request #38386 from reduz/new-lightmapper
New GPU lightmapper
Diffstat (limited to 'thirdparty/oidn/mkl-dnn/src/cpu/cpu_convolution_pd.hpp')
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1 files changed, 74 insertions, 0 deletions
diff --git a/thirdparty/oidn/mkl-dnn/src/cpu/cpu_convolution_pd.hpp b/thirdparty/oidn/mkl-dnn/src/cpu/cpu_convolution_pd.hpp
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+/*******************************************************************************
+* Copyright 2016-2018 Intel Corporation
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#ifndef CPU_CONVOLUTION_PD_HPP
+#define CPU_CONVOLUTION_PD_HPP
+
+#include <assert.h>
+
+#include "c_types_map.hpp"
+#include "convolution_pd.hpp"
+#include "type_helpers.hpp"
+#include "utils.hpp"
+
+namespace mkldnn {
+namespace impl {
+namespace cpu {
+
+struct cpu_convolution_fwd_pd_t: public convolution_fwd_pd_t {
+ using convolution_fwd_pd_t::convolution_fwd_pd_t;
+
+ bool has_padded_dst() const {
+ memory_desc_wrapper dst_d(&dst_md_);
+ return OC() != dst_d.padded_dims()[1];
+ }
+
+ bool wants_padded_bias() const {
+ if (!with_bias()) return false;
+ return has_padded_dst();
+ }
+
+ bool wants_zero_pad_dst(bool jit_impl = true) const {
+ if (!has_padded_dst()) return false;
+ const auto &po = attr()->post_ops_;
+ int idx;
+ if ((idx = po.find(primitive_kind::eltwise)) == -1) return false;
+ return !math::eltwise_fwd_preserves_zero(po.entry_[idx].eltwise.alg,
+ jit_impl);
+ }
+};
+
+struct cpu_convolution_bwd_data_pd_t: public convolution_bwd_data_pd_t {
+ using convolution_bwd_data_pd_t::convolution_bwd_data_pd_t;
+};
+
+struct cpu_convolution_bwd_weights_pd_t: public convolution_bwd_weights_pd_t {
+ using convolution_bwd_weights_pd_t::convolution_bwd_weights_pd_t;
+
+ bool wants_padded_bias() const {
+ if (!with_bias()) return false;
+ memory_desc_wrapper diff_dst_d(&diff_dst_md_);
+ return OC() != diff_dst_d.padded_dims()[1];
+ }
+};
+
+}
+}
+}
+
+#endif
+
+// vim: et ts=4 sw=4 cindent cino^=l0,\:0,N-s