diff options
author | VolTer <mew.pur.pur@abv.bg> | 2022-10-20 03:03:47 +0200 |
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committer | VolTer <mew.pur.pur@abv.bg> | 2022-10-20 03:03:47 +0200 |
commit | 1fd59b98fb73e54a1d19f8b8dc4a50aa55fa315a (patch) | |
tree | fc58906ef65c3199bbe7635e354784fcddd8cb7b /core/variant | |
parent | 28a4eec9a77bc797b7147be2453cdbe85cf47d7f (diff) |
Remove duplicate operator registrations
Diffstat (limited to 'core/variant')
-rw-r--r-- | core/variant/variant_op.cpp | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/core/variant/variant_op.cpp b/core/variant/variant_op.cpp index 6cca7955ae..301fd00d26 100644 --- a/core/variant/variant_op.cpp +++ b/core/variant/variant_op.cpp @@ -384,10 +384,6 @@ void Variant::_register_variant_operators() { register_op<OperatorEvaluatorDivNZ<Vector2, Vector2i, double>>(Variant::OP_DIVIDE, Variant::VECTOR2I, Variant::FLOAT); register_op<OperatorEvaluatorDivNZ<Vector2i, Vector2i, int64_t>>(Variant::OP_DIVIDE, Variant::VECTOR2I, Variant::INT); - register_op<OperatorEvaluatorDiv<Vector2, Vector2, Vector2>>(Variant::OP_DIVIDE, Variant::VECTOR2, Variant::VECTOR2); - register_op<OperatorEvaluatorDiv<Vector2, Vector2, double>>(Variant::OP_DIVIDE, Variant::VECTOR2, Variant::FLOAT); - register_op<OperatorEvaluatorDiv<Vector2, Vector2, int64_t>>(Variant::OP_DIVIDE, Variant::VECTOR2, Variant::INT); - register_op<OperatorEvaluatorDiv<Vector3, Vector3, Vector3>>(Variant::OP_DIVIDE, Variant::VECTOR3, Variant::VECTOR3); register_op<OperatorEvaluatorDiv<Vector3, Vector3, double>>(Variant::OP_DIVIDE, Variant::VECTOR3, Variant::FLOAT); register_op<OperatorEvaluatorDiv<Vector3, Vector3, int64_t>>(Variant::OP_DIVIDE, Variant::VECTOR3, Variant::INT); @@ -498,8 +494,6 @@ void Variant::_register_variant_operators() { register_op<OperatorEvaluatorBitXor<int64_t, int64_t, int64_t>>(Variant::OP_BIT_XOR, Variant::INT, Variant::INT); register_op<OperatorEvaluatorBitNeg<int64_t, int64_t>>(Variant::OP_BIT_NEGATE, Variant::INT, Variant::NIL); - register_op<OperatorEvaluatorBitNeg<int64_t, int64_t>>(Variant::OP_BIT_NEGATE, Variant::INT, Variant::NIL); - register_op<OperatorEvaluatorAlwaysTrue<Variant::OP_EQUAL, Variant::NIL, Variant::NIL>>(Variant::OP_EQUAL, Variant::NIL, Variant::NIL); register_op<OperatorEvaluatorEqual<bool, bool>>(Variant::OP_EQUAL, Variant::BOOL, Variant::BOOL); register_op<OperatorEvaluatorEqual<int64_t, int64_t>>(Variant::OP_EQUAL, Variant::INT, Variant::INT); |